Titanium silicide TiSi2: titanium silicide TiSi2 was first widely used in MOS technology above 0.25 μ m due to its simple process and good high temperature stability. The process is as follows: firstly, Ti metal is deposited on the wafer by means of physical sputtering, and then the intermediate phase C49 with high resistance is obtained by the first annealing at a slightly lower temperature (600 ~ 700 ℃), and then the C49 phase is transformed into the final low resistance C54 phase by the second annealing at a slightly higher temperature (800 ~ 900 ℃).
For titanium silicides, the biggest challenge is the linewidth effect of TiSi2. That is, TiSi2 resistance will increase with the decrease of line width or contact area. The reason is that when the linewidth becomes too narrow, the phase transition process from C49 phase to C54 phase will change from the original two-dimensional mode to one-dimensional mode, which will greatly increase the temperature and time of phase transition. However, too high annealing temperature will aggravate the diffusion of the main diffusion element Si and cause the problem of electric leakage and even short circuit. Therefore, with the continuous reduction of MOS size, the phenomenon of insufficient TiSi2 phase transition and increased contact resistance will occur.
Cobalt silicide CoSi2: as a substitute for titanium silicide, cobalt silicide was first applied to technical nodes from 0.18 μ m to 90 nm. The main reason is that it has no linewidth effect under the condition of this size. In addition, the annealing temperature during the formation of cobalt silicide is lower than that of titanium silicide, which is conducive to the reduction of process heat budget. At the same time, the leakage and short circuit caused by bridge are also improved.
Although at 90 nm and above, the nucleation process from high resistance Cosi to low resistance CoSi2 is still very rapid, and there is no linewidth effect during the phase transition of CoSi2. However, when the technology advances to less than 45nm, this phase transition nucleation process will be greatly limited, so the linewidth effect will appear. In addition, as the doping depth of the active region becomes shallower, the excessive consumption of highly doped silicon on the surface during the formation of cobalt silicide can not meet the requirements of advanced processes. After MOS enters 45nm, due to the influence of short channel effect, higher requirements are put forward for the thermal budget in the silicide process. The second annealing temperature of CoSi2 is usually above 700 ℃, so it is necessary to find a substitute with more thermal budget advantages.
Nickel silicide Nisi: nickel silicide (Nisi) is becoming the material of choice for contact applications for semiconductor processes with technical nodes of 45nm and below. Compared with the previous titanium cobalt silicides, nickel silicides have a series of unique advantages. Nickel silicide still uses the two-step annealing process similar to the previous silicide, but the annealing temperature has been significantly reduced (<600oc), which greatly reduces the damage to the ultra shallow junction formed in the device. From the perspective of diffusion kinetics, shorter annealing time can effectively inhibit ion diffusion. Therefore, spike annealing is increasingly used in the first annealing process of nickel silicides. The annealing has only a temperature rise and fall process without a heat preservation process, so it can greatly limit the diffusion of doped ions in the formation of silicides.
This article is reprinted from the network